Crosstalk regularly results, for example, in communication systems, wherein a first signal of a first communication channel is disturbed by interference from a second signal of a second communication channel. Interference may result from a plurality of effects. In electric systems, like, for example, systems on circuit boards, electric plug connections or two-wire cable bundles, every electric path acts as a communication channel. With high data rates, capacitive, inductive and resistive crosstalk results between adjacent electric paths or lines, respectively, wherein, due to the practical relevance, in the following purely capacitive crosstalk is considered. Emitted energy from a first line is unwantedly coupled to a second line or received by the second line, respectively. This unwanted transfer of signal energy, generally referred to as crosstalk, may substantially deteriorate the data reception on the second line. Crosstalk is typically bi-directional, so that one line may both emit energy to one or several lines and also receive electromagnetic energy from one or several lines.
Due to the increasing integration density of integrated circuits, electric systems set up from the same are becoming continuously smaller. From this, an ever decreasing distance between adjacent electric lines results. By decreasing distances between adjacent lines, their capacitive coupling, and thus the crosstalk between the adjacent lines, continually increases. Without suitable countermeasures, crosstalk will more and more become a limiting factor with regard to increasing data rates of modern electric systems.
For example, memory systems like SRAM (SRAM=static random access memory) or DRAM memory systems may be regarded as examples for an electric system with ever denser adjacent lines. With DRAM memories, a charge of a memory cell capacitor is interpreted as a logic memory state, usually “1” or “0”. During a read access, the charge of different cell capacitors selected using a word line are switched to the respective bitlines. The voltage applied to the bitlines is amplified by so-called read amplifiers and compared to a reference voltage, the bitline medium voltage.
Here, the voltage of a certain bitline depends on the charge of the respective cell capacitor. Additionally, by capacitive coupling, signals of adjacent bitlines couple over to the bitline. This crosstalk may be substantial and thus strongly decrease a signal-to-noise power ratio on bitlines. This may necessitate a longer read and/or write period and/or a longer bitline precharge time. Thus, the power of memory systems may significantly decrease with regard to speed.
The crosstalk between bitlines is even more critical for DRAM memories which use more than two logical values (so-called multilevel logic). In this case, the signal-to-noise power ratio on the bitlines limits the number of logical states which may be mapped to the charge of a single capacitor.
It would thus be desirable to reduce negative effects, like, for example, the decrease of the signal-to-noise power ratio caused by the crosstalk between adjacent lines.
This may, for example, be done by lengthening the time period between activating and sampling, i.e., reading or writing memory contents, respectively. By this, however, a capacity of the memory system is reduced with regard to speed.
Further, the distance between adjacent bitlines might be increased. This would, however, lead to a lower integration density and thus increase manufacturing costs due to the increased space requirements.
Further, it is normal to use twisted bitlines (so-called twisted arrays). This has the disadvantage, however, that additional space and additional bitline lengths are needed for a DRAM memory matrix. Depending on the way of twisting, crosstalk between bitlines is merely reduced, but not eliminated. Further, when twisting, the structure of the memory matrix is complicated, which makes an analysis and a test of the memory more difficult.
The publication US 2006/0159002 A1 discloses an algorithm for eliminating crosstalk between adjacent lines. This algorithm, however, necessitates a precise knowledge of the undisturbed aggressor signal, i.e., the signal causing the interference.
Thus, an improved concept for reducing or eliminating crosstalk between adjacent lines without the above-mentioned disadvantages would be desirable.